EDI20180C25AC Synchronous Static RAM - Input and Output Latched
From Electronic Designs, Inc.
| Bits Per Word | 18 |
| Military | N |
| Nom. Supp (V) | 5.0 |
| Number of Words | 64k |
| Output Config | 3-State |
| Package | QCC-J |
| Pins | N/A |
| Technology | CMOS |
| t(acc) Max. (S) | 25n |
| tW Min (S) | 25n |
