F100336QC 4-Bit Shift Register
From National Semiconductor
| Bits Per Reg. | 4 |
| Data Inp Mode | Parallel |
| Data Outp Mode | Parallel |
| Military | N |
| Mode Dyn/ Stat | Static |
| No. of Reg. | 1 |
| Output Config | Emitr-Foll |
| P(D) Max.(W) Power Dissipation | 1.0 |
| Package | QCC-J |
| Pins | 28 |
| Technology | ECL |
| Vsup Nom.(V) Supply Voltage | -5.2 |
| f(oper) Max. (Hz) | 300M |
| t(PLH) Maximum (S) | 1.8n |
