MM5012D
256 to 500 Bit Shift Register

From National Semiconductor

StatusDiscontinued
Bits Per Reg.256
Data Inp ModeSerial
Data Outp ModeSerial
MilitaryN
Mode Dyn/ StatDynamic
No. of Reg.2
Output Config3-State
P(D) Max.(W) Power Dissipation272m
PackageDIP
Pins14
TechnologyPMOS
Vsup Nom.(V) Supply Voltage5.0
f(oper) Max. (Hz)2.5M
t(PLH) Maximum (S)250n

External links