PZ5064N10A84 Electrically-Erasable PLD (EEPLD) - IN-SYS Prog., JTAG
From Philips Semiconductors / NXP Semiconductors
| Logic Modes | CombnSeqnt |
| Military | N |
| Nom. Supp (V) | 5 |
| Number of Inputs | 68 |
| Output Config | 3-State |
| Package | QCC-J |
| Pins | 84 |
| Prod. Terms Max. | 5 |
| Technology | CMOS |
| t(PLH) Maximum (S) | 12.5n |
